Write-Efficient STT/SOT Hybrid Triple-Level Cell for High-Density MRAM

Spin-transfer torque magnetic random access memory (STT-MRAM) offers nonvolatility, good scalability, high speed, and low-power benefits. Multilevel cell (MLC) is an efficient technology to boost the storage density of the STT-MRAM. However, the conventional MLC structure is not suitable for more than 2-b storage due to inefficient multistep read/write operations. In this article, combining the emerging spin-orbit torque (SOT) and STT mechanisms, we propose a novel STT/SOT hybrid triple-level cell (TLC) MRAM cell structure. Corresponding write and read schemes are designed for this hybrid bit-cell to achieve low-cost operations. Unlike the regular stacked TLC, 3-b data can be written in two steps in the proposed cell structure, and be read in parallel with the assistance of SOT. Simulation results show that the proposed structure achieves 32% and 43% savings on write delay and energy consumption, respectively. Monte Carlo statistic simulation results indicate 1.4× improvement in sensing margin as well.