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Uniformity of device performance improvement for the SOT-MRAM by optimizing the lithography process at 200-mm-wafer manufacturing platform

  • Bowen Man
  • , Xiaowei Yang
  • , Qingsong Zhao
  • , Cong Zhang
  • , Shuqin Lv
  • , Shiyang Lu
  • , Kaihua Cao*
  • , Hongxi Liu*
  • , Gefei Wang
  • *此作品的通讯作者
  • Truth Memory Tech. Corporation

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

We examined the influence of process uniformity on the device performance for the spin-orbit torque (SOT) magnetic random access memory (MRAM) devices. By optimizing the lithography process through changing the multi-energies exposure compensation and pretreatment in developing, we demonstrated 1.6 times sigma improvement of the critical dimensions (CD), leading to 49.5%, 54.2%, and 63.2% sigma% reduction for SOT channel resistance (Rb), magnetic tunnel junction (MTJ) resistance (Rmin) and switching current (IC) respectively. These promising results will help to deliver SOT-MRAM to the mass manufacturing in the semiconductor industry.

源语言英语
主期刊名IWAPS 2022 - 2022 6th International Workshop on Advanced Patterning Solutions
编辑Yayi Wei, Tianchun Ye
出版商Institute of Electrical and Electronics Engineers Inc.
ISBN(电子版)9798350397666
DOI
出版状态已出版 - 2022
活动6th International Workshop on Advanced Patterning Solutions, IWAPS 2022 - Virtual, Online, 中国
期限: 21 10月 202222 10月 2022

出版系列

姓名IWAPS 2022 - 2022 6th International Workshop on Advanced Patterning Solutions

会议

会议6th International Workshop on Advanced Patterning Solutions, IWAPS 2022
国家/地区中国
Virtual, Online
时期21/10/2222/10/22

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