Toward energy-efficient STT-MRAM design with multi-modes reconfiguration

CMOS compatible spin-transfer-torque magnetic random access memory (STT-MRAM) has demonstrated promising developments as the next-generation embedded non-volatile memory (eNVM). In this survey, we provide the state-of-the-art multi-modes reconfigurable techniques for energy-efficient STT-MRAM implementation. We resort to the bottom-up design approach with a twofold aim: 1) summarizing related work from bit-cell to circuit and system levels with conventional and emerging memories. 2) analyzing the present research status of multi-modes reconfigurable techniques in MRAM, which consist of tunable bit-cell configuration, in-memory computing and hybrid memory system. Experimental comparisons show that both reconfiguration and in-MRAM computing obtain extra design freedom. Nonvolatile data accessing cost can be well-alleviated, and thereby improving energy efficiency of MRAM.