Teaching research and practice of FPGA-based multi-core parallel computing course

Multicore related courses delivered or several years in universities, while mostly were parallel programming or just simulation with desktop software. This paper presented very hard approaches with FPGA to run up to 13 cores in a token ring, dedicated tool chains were used to compile and link C code into the executable object code. Especially, different parallel programming solutions of TSP (Travel Salesman Problem) were arranged for easy to difficult level of the course to let the student know the essential concepts of parallel architecture like synchronization, message, shared memory, barrier, etc. Several algorithms were involved with great disparity in performance comparison. In this course, both software and hardware skills were drilled, even slightly modification of the HDL designing of the cores were required. The course was based on the MIT course Multicore Systems Laboratory (6.173) and made some extensions, tried a new way to let the students to sense the multicore system architecture.