Self-controlled synthesis of microscale silicide embossments and pits with multi-shape and orientation

By high temperature annealing of silicon wafers with thin Cu and Fe films deposited on, we got the silicides embossments (SEs)/silicon etching pits (SEPs) with different morphologies. Microscale triangle, square and wire-like SEs/SEPs were obtained on Si(111), Si(100) and Si(110) substrates, respectively. The synthesis of SEs/SEPs was closely related to temperature and orientation of Si substrates. We got copper silicides embossments at 950°C but silicon etching pits at 1100°C. The size of SEs/SEPs can be changed from hundred nm to several m. We analyzed the morphological evolution and formation mechanism from SEs to SEPs with comparing samples of different temperature. This simple and practicable work may help to develop new technology for Si-based nanofabrication and to find potential functional nanomaterials in the future.