@inproceedings{93f1ff409f2a494eb295c866f5a7d586,
title = "RRNS quasi-chaotic coding and its FPGA implementation",
abstract = "In this paper, a new architecture of the redundant residue number system (RRNS) based quasi-chaotic coding is proposed for the secure telecommunication systems and networks. In the proposed architecture, a number of modulo operations required by the existing designs are replaced by binary coding operations to simplify the design. Also, a moduli selection method and a residue-to-binary converter with error-correction capability are proposed to further improve the efficiency of the design specifically for FPGA implementation. The proposed architecture is implemented and tested using Matlab and Xilinx FPGA hardware. The results show that compared to the existing design, the proposed design requires only 80\% of the hardware resources while maintaining the same speed. The power consumption is also reduced by 25\%.",
author = "Wei Wang and Xiaolin Zhang and Chenyang Yang and Swamy, \{M. N.S.\} and Ahmad, \{M. O.\}",
year = "2005",
doi = "10.1109/SNPD-SAWN.2005.66",
language = "英语",
isbn = "0769522947",
series = "Proceedings - Sixth Int. Conf. on Softw. Eng., Artificial Intelligence, Netw. and Parallel/Distributed Computing and First ACIS Int. Workshop on Self-Assembling Wireless Netw., SNPD/SAWN 2005",
pages = "274--280",
booktitle = "Proceedings - Sixth Int. Conf. on Softw. Eng., Artif. Intelligence, Networking and Parallel/Distributed Computing and First ACIS Int. Workshop on Self-Assembling Wireless Networks, SNPD/SAWN 2005",
note = "6th International Conference on Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing and 1st ACIS International Workshop on Self-Assembling Wireless Networks, SNPD/SAWN 2005 ; Conference date: 23-05-2005 Through 25-05-2005",
}