@inproceedings{bc6868f908784bf88aab904f9b757374,
title = "Research on crosstalk issue of through silicon via for 3D integration",
abstract = "This paper focused on the crosstalk analysis of through silicon via (TSV) for 3D integration. It started with the TSV electrical character. A GS TSV pair was established in HFSS and its electrical model was created in ADS. The S-parameter showed a good match between the two methods which validated the electrical model. Crosstalk analysis was an important part in this paper. First, the S-parameter of GSSG-BUMP-RDL model was simulated from 0.1GHz to 20GHz in HFSS, and the NEXT and FEXT crosstalk at 1GHz and 10GHz were given respectively in time domain. Then we added more ground TSV to the model to suppress the crosstalk. And it showed a better capacity to suppress the FEXT crosstalk. Finally, another improved model which used a ground plane to replace the ground RDL was carried out, and it resulted in a better performance to decrease the NEXT crosstalk.",
keywords = "3D integration, Crosstalk suppression, Electrical modeling of TSV, NEXT and FEXT crosstalk",
author = "Ting Kang and Zhaowen Yan and Wei Zhang and Jianwei Wang",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 28th IEEE International System on Chip Conference, SOCC 2015 ; Conference date: 08-09-2015 Through 11-09-2015",
year = "2016",
month = feb,
day = "12",
doi = "10.1109/SOCC.2015.7406991",
language = "英语",
series = "International System on Chip Conference",
publisher = "IEEE Computer Society",
pages = "396--400",
editor = "Thomas Buchner and Danella Zhao and Karan Bhatia and Ramalingam Sridhar",
booktitle = "Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015",
address = "美国",
}