TY - GEN
T1 - Parallel realization of high resolution radar on multi-DSP system
AU - Wang, Jun
AU - Wu, Wei
AU - Zhang, Wenhao
AU - Lei, Peng
AU - Li, Wei
PY - 2009
Y1 - 2009
N2 - In this paper, a pulsed Doppler (PD) radar signal processing algorithm designed to track targets with high velocity is implemented in hardware based on 8 ADSP-TS201 TigerSHARC processors. And both the radar signal processing algorithm and hardware architecture are proposed. To map the algorithm effectively, pipeline optimization on system and instruction levels are adopted, and various factors are taken into consideration, such as system complexity, balance of the task in each processor, communication between processors. Practical experiment proves that both the design of this hardware platform and the realization of algorithm are effective, real-time and reliable. (4 pages).
AB - In this paper, a pulsed Doppler (PD) radar signal processing algorithm designed to track targets with high velocity is implemented in hardware based on 8 ADSP-TS201 TigerSHARC processors. And both the radar signal processing algorithm and hardware architecture are proposed. To map the algorithm effectively, pipeline optimization on system and instruction levels are adopted, and various factors are taken into consideration, such as system complexity, balance of the task in each processor, communication between processors. Practical experiment proves that both the design of this hardware platform and the realization of algorithm are effective, real-time and reliable. (4 pages).
KW - PD radar
KW - Parallel processing algorithm
KW - Pipeline optimization
UR - https://www.scopus.com/pages/publications/70350176178
U2 - 10.1049/cp.2009.0113
DO - 10.1049/cp.2009.0113
M3 - 会议稿件
AN - SCOPUS:70350176178
SN - 9781849190107
T3 - IET Conference Publications
BT - IET International Radar Conference 2009
T2 - IET International Radar Conference 2009
Y2 - 20 April 2009 through 22 April 2009
ER -