Parallel algorithm realization of high range resolution radar based on multi-processor

An advanced real-time pulsed Doppler-pulse compressed radar signal processing system that managed to track targets with high velocity was implemented based on 8 ADSP-TS201 TigerSHARC processors. System structure designing was discussed, including DSP (digital signal processors) topology, communication, synchronization and control. In parallel system, it is crucial to optimize the mapping of problems onto parallel execute units of specific hardware platform. When implementing effective algorithm mapping, various factors were considered, such as algorithm complexity and resolvability, hardware process and real-time capability, and CPU load balance of communication and calculation tasks. Parallel design and optimization on both system and instruction levels were emphasized, while realizing system level optimization. Also parallel pipeline designing methodology was presented, including the pipelines both inside and between DSPs. With regard to the instruction level optimization, several parallel mechanisms such as SIMD (single instruction multiple data), static superscalar, BTB (branch target buffer) and space-time tradeoff were studied to optimize the system with extremely high performance, which was proved by the field experiment results.