Novel Nonvolatile Lookup Table Design Based on Voltage-Controlled Spin Orbit Torque Memory

Nonvolatile lookup table (NVLUT) is promising for constructing reconfigurable logic device, such as field programmable gate array (FPGA). In the last decade, there have been extensive studies on constructing novel FPGAs using CMOS technology combined with emerging spintronic devices. However, although spintronic device promises desirable features such as nonvolatility and high area density, its relatively slow switching speed and high power consumption make it quite challenging to use it as a drop-in replacement for static random access memory (SRAM). In this article, we propose a novel nonvolatile NVLUT design, called VC-LUT, based on a voltage controlled spin orbit torque (VC-SOT) device, which utilizes a symmetrical structure of spintronic memory cell and a separated CMOS select tree to enhance operating speed and to reduce power consumption. In our VC-LUT design, two VC-SOT-MTJ devices were placed back-to-back, forming a complementary and symmetrical structure. The VC-LUT circuits are designed and evaluated based on a physics-based VC-SOT-MTJ model and a 40-nm CMOS design-kit. The simulation results show that our proposed design achieves over 98.6% (97.6%) and 69.5% (71.6%) improvement in terms of energy and delay in comparison with the four-input spin transfer torque (STT) [spin orbit torque (SOT)] based counterparts.