摘要
With the scaling down of the technology node of complementary metal–oxide–semiconductor (CMOS), the bit error rate (BER) of magnetic random memory (MRAM) seriously threats the reliability, especially multiple-cell upset (MBUs). Error correction codes (ECCs) such as one-step majority logic decodable (OS-MLD) codes are proposed with strong error correction capabilities, and efficient hardware overhead. However, the OS-MLD codes are not suitable for the burst error correction, which require more redundancy bits or extra memory cells. A novel m order Latin square matrix (LSM) codes for MRAM are presented, which can provide fewer equivalent bits and more flexible adjustments for correcting large burst errors. The 5-bit LSM code area is only 90898.71 μm2, and the power consumption is only 0.82 mw.
| 源语言 | 英语 |
|---|---|
| 文章编号 | 115505 |
| 期刊 | Microelectronics Reliability |
| 卷 | 162 |
| DOI | |
| 出版状态 | 已出版 - 11月 2024 |
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