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Non-volatile register based on hybrid spintronics/CMOS technology

  • Weisheng Zhao*
  • , Eric Belhaire
  • , Claude Chappert
  • , Virgile Javerliac
  • , Pascale Mazoyer
  • *此作品的通讯作者
  • CNRS
  • Université Paris-Saclay
  • Crocus Technology
  • STMicroelectronics

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

In this paper, we present a non-volatile register based on hybrid Spintronics/CMOS technology, which can store securely and non-vocatively all the intermediate data in the logic circuits as FPGA and ASIC. The non-volatility of this register allows to power down the circuits keeping the data thereby reduce significantly the standby power and accelerate the chip re (boot) latency. Based on STMicroelectronics 90nm design kit and a complete MTJ Spice model for MRAM development, the delay propagation of this register is lower than 500ps. We propose also the solutions to overcome the high sensitivity issue for this non-volatile register.

源语言英语
主期刊名ICSICT 2008 - 2008 9th International Conference on Solid-State and Integrated-Circuit Technology Proceedings
2136-2139
页数4
DOI
出版状态已出版 - 2008
已对外发布
活动2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008 - Beijing, 中国
期限: 20 10月 200823 10月 2008

出版系列

姓名International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT

会议

会议2008 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008
国家/地区中国
Beijing
时期20/10/0823/10/08

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