TY - JOUR
T1 - Negative capacitance transistors with monolayer black phosphorus
AU - Liu, Fei
AU - Zhou, Yan
AU - Wang, Yijiao
AU - Liu, Xiaoyan
AU - Wang, Jian
AU - Guo, Hong
N1 - Publisher Copyright:
© The Author(s) 2016.
PY - 2016/7/27
Y1 - 2016/7/27
N2 - Quantum transport properties of negative capacitance transistors (NC-FETs) with monolayer black phosphorus (ML-BP) are theoretically studied. Our calculations show that atomistic thin ML-BP can enhance the amplification effect of the ferroelectric layer, and subthreshold swing is effectively reduced to 27 mV per decade in ML-BP NC-FETs. Device performance can be further improved by increasing the thickness of ferroelectric layer and using thinner or high-k insulate layer. Due to the temperature dependence of ferroelectric layer ML-BP NC-FETs have higher on-state current at low temperature, which is different from that of MOSFETs. By considering the metal-ferroelectric interface layer, our calculations show that the device performance is degraded by the interface. Compared with the International Technology Roadmap (ITRS) 2013 requirements, ML-BP NC-FETs can fulfil the ITRS requirements for high-performance logic with a reduced supply voltage. The new device can achieve very low power delay product per device width at VD = 0.3 V, which is just 44% of that in ML-BP FETs.
AB - Quantum transport properties of negative capacitance transistors (NC-FETs) with monolayer black phosphorus (ML-BP) are theoretically studied. Our calculations show that atomistic thin ML-BP can enhance the amplification effect of the ferroelectric layer, and subthreshold swing is effectively reduced to 27 mV per decade in ML-BP NC-FETs. Device performance can be further improved by increasing the thickness of ferroelectric layer and using thinner or high-k insulate layer. Due to the temperature dependence of ferroelectric layer ML-BP NC-FETs have higher on-state current at low temperature, which is different from that of MOSFETs. By considering the metal-ferroelectric interface layer, our calculations show that the device performance is degraded by the interface. Compared with the International Technology Roadmap (ITRS) 2013 requirements, ML-BP NC-FETs can fulfil the ITRS requirements for high-performance logic with a reduced supply voltage. The new device can achieve very low power delay product per device width at VD = 0.3 V, which is just 44% of that in ML-BP FETs.
UR - https://www.scopus.com/pages/publications/85006638265
U2 - 10.1038/npjquantmats.2016.4
DO - 10.1038/npjquantmats.2016.4
M3 - 文章
AN - SCOPUS:85006638265
SN - 2397-4648
VL - 1
JO - npj Quantum Materials
JF - npj Quantum Materials
M1 - 16004
ER -