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MCHEAS: Optimizing Large-Parameter NTT Over Multicluster In-Situ FHE Accelerating System

  • Zhenyu Guan
  • , Yongqing Zhu
  • , Luchang Lei
  • , Hongyang Jia
  • , Yi Chen
  • , Bo Zhang
  • , Changrui Ren
  • , Jin Dong*
  • , Song Bian*
  • *此作品的通讯作者
  • Beihang University
  • Tsinghua University
  • Beijing Academy of Blockchain and Edge Computing

科研成果: 期刊稿件文章同行评审

摘要

Fully Homomorphic encryption (FHE) enables high-level security but with a heavy computation workload, necessitating software-hardware co-design for aggressive acceleration. Recent works on specialized accelerators for HE evaluation have made significant progress in supporting lightweight RNS-CKKS applications, especially those with high-density in-memory computing techniques. To fulfill higher computational demands for more general applications, this article proposes multicluster HE accelerating system (MCHEAS), an accelerating system comprising multiple in-situ HE processing accelerators, each functioning as a cluster to perform large-parameter RNS-CKKS evaluation collaboratively. MCHEAS features optimization strategies including the synchronous, preemptive swap, square-diagonal, and odd-even index separation. Using these strategies to compile the computation and transmission of number theoretic transform (NTT) coefficients, the method optimizes the intercluster data swaps, a major bottleneck in NTT computations. Evaluations show that under 1 GHz, with different intercluster data transfer bandwidths, our approach accelerates NTT computations by 26.40% to 51.75%. MCHEAS also improves computing unit utilization by 10.30% to 33.97%, with a maximum peak utilization rate of up to 99.62%. MCHEAS achieves 17.63% to 34.67% speedups for HE operations involving NTT, and 15.12% to 30.62% speedups for demonstrated applications, while enhancing the computing units’ utilization by 5.18% to 21.87% during application execution. Furthermore, we compare MCHEAS with SOTA designs under a specific intercluster data transfer bandwidth, achieving up to 81.45\times their area efficiencies in applications.

源语言英语
页(从-至)3683-3696
页数14
期刊IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
44
10
DOI
出版状态已出版 - 2025

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