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Low error-floor majority-logic decoding based algorithm for non-binary LDPC codes

  • Beihang University

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

The traditional majority-logic decoding (MLgD) based algorithms suffer error-floors for decoding non-binary LDPC codes with small column weights. This paper presents a bit-reliability based MLgD (BRB-MLgD) algorithm with low error-floors for non-binary LDPC codes. The proposed algorithm is carried out based on the binary representations of non-binary symbols. The reliability update along each edge of the Tanner graph of a non-binary LDPC code is in terms of bits rather than symbols. Thus, its computational complexity and memory consumption are less than those of the existing MLgD based algorithms. Simulation results indicate that the proposed algorithm can significantly reduce error-floors with small performance degradation in the waterfall region.

源语言英语
主期刊名2015 IEEE International Conference on Communications, ICC 2015
出版商Institute of Electrical and Electronics Engineers Inc.
4072-4076
页数5
ISBN(电子版)9781467364324
DOI
出版状态已出版 - 9 9月 2015
活动IEEE International Conference on Communications, ICC 2015 - London, 英国
期限: 8 6月 201512 6月 2015

出版系列

姓名IEEE International Conference on Communications
2015-September
ISSN(印刷版)1550-3607

会议

会议IEEE International Conference on Communications, ICC 2015
国家/地区英国
London
时期8/06/1512/06/15

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