@inproceedings{6ff601e9b61f4ad7a3e789edabe4a05d,
title = "KATO: Knowledge Alignment And Transfer for Transistor Sizing Of Different Design and Technology",
abstract = "Automatic transistor sizing in circuit design continues to be a formidable challenge. Despite that Bayesian optimization (BO) has achieved significant success, it is circuit-specific, limiting the accumulation and transfer of design knowledge for broader applications. This paper proposes (1) efficient automatic kernel construction, (2) the first transfer learning across different circuits and technology nodes for BO, and (3) a selective transfer learning scheme to ensure only useful knowledge is utilized. These three novel components are integrated into BO with Multi-objective Acquisition Ensemble (MACE) to form Knowledge Alignment and Transfer Optimization (KATO) to deliver state-of-the-art performance: up to 2x simulation reduction and 1.2x design improvement over the baselines.",
keywords = "Bayesian Optimization, Transfer learning, Transistor Sizing",
author = "Xing, \{Wei W.\} and Weijian Fan and Zhuohua Liu and Yuan Yao and Yuanqi Hu",
note = "Publisher Copyright: {\textcopyright} 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.; 61st ACM/IEEE Design Automation Conference, DAC 2024 ; Conference date: 23-06-2024 Through 27-06-2024",
year = "2024",
month = nov,
day = "7",
doi = "10.1145/3649329.3657380",
language = "英语",
series = "Proceedings - Design Automation Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "Proceedings of the 61st ACM/IEEE Design Automation Conference, DAC 2024",
address = "美国",
}