Hybrid Stochastic Number and Its Neural Network Computation

Stochastic computing (SC) is unique in that it is a type of arithmetic computation based on stochastic numbers (bitstream) instead of binary numbers (BNs). Stochastic number (SN) represents and carries information in the form of pseudo-analog probabilities by CMOS gate circuits. The renewed success of the stochastic number system is mainly related to super low power consumption and high reliability for edge computing. In fact, the stochastic number is a nonpositional number representation that is intrinsically sequential and consequently used for certain important arithmetic operations (such as addition/subtraction and multiplication), and corresponds to a super low area circuit. This article proposes a novel hybrid number system of BNs and stochastic number representation, called hybrid stochastic number (HSN). This study introduces the basic theoretical aspects of the HSN and demonstrates the properties of hybrid stochastic computing (HSC). The hardware implementation of deep neural network with HSC is fabricated using a standard 40-nm low-power CMOS process, with a core area of 0.53 mm2, power of 102.3 mW, and clock of 400 MHz, which has 4544 multiply accumulation operations (MACs).