General DSP based multi-modal video encoder

This paper presents a kind of advanced and widely applicable video encoder designed using general high speed DSP. Not only could it adapt to different channels and various environments, compress various gray/color picture in different resolutions, but also it is flexible and extensible to develop a series of products with different performances and video compression algorithms. The FPGA preprocessed some task for compression to enhance the encoder's performance. Considering the VLIW architecture and the memory resource limitation of TMS320C6000 DSPs and the requirements of MPEG compression algorithms, the paper optimizes the video encoder software on software architecture, data transmission and source code respectively. The paper gives solutions to signal integrity and timing matching when the high speed DSP interconnects with SDRAMs.