摘要
The processing speed of some digital circuits reaches GHz level with the conventional scheme of fractional sampling rate transformation used in wideband all digital receivers, which becomes a bottleneck of the digital realization. The cascaded response of the up-sampling process and the poly-phase filter was analyzed based on the fractional sampling rate transformation theory, with an improved transformation scheme then derived. Comparison between the results of the improved scheme and the conventional scheme shows the theoretical analysis validity. The results show that the requirement of the improved scheme on the processing speed of digital devices is only 1/min{I, D} of the conventional scheme with the requirement of the improved scheme being free from I/D, where I and D are interpolation and decimation factors.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 1643-1645 |
| 页数 | 3 |
| 期刊 | Qinghua Daxue Xuebao/Journal of Tsinghua University |
| 卷 | 50 |
| 期 | 10 |
| 出版状态 | 已出版 - 10月 2010 |
| 已对外发布 | 是 |
指纹
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