TY - GEN
T1 - Formal specification and verification of task time constraints for real-time systems
AU - Ge, Ning
AU - Pantel, Marc
AU - Crégut, Xavier
PY - 2012
Y1 - 2012
N2 - Safety critical real-time systems (RTS) have stringent requirements related to the formal specification and verification of system's task-level time constraints. The most common methods used to assess properties in design models rely on the translation from user models to formal verification languages like Time Petri Net (TPN), and on the expression of required properties using Timed Linear Temporal Logic (LTL), Computation Tree Logic (CTL) and μ-calculus. However, these logics are mainly used to assess safety and liveness properties. Their capability for expressing timing properties is more limited and can lead to combinatorial state space explosion problems during model checking. In addition, the existing methods are mainly concerned with logical relations between the events without the consideration of time tolerance. This paper introduces a formal specification and verification method for assessing system's task-level time constraints, including synchronization, coincidence, exclusion, precedence, sub-occurrence and causality, in both finite and infinite time scope. We propose a translation method to formally specify task-level time constraints, and decompose time constraints by a set of event-level time property patterns. These time property patterns are quantitative and independent from both the design modeling language and the verification language. The observer-based model checking method relying on TPN is used to verify these time property patterns. This contribution analyses the method's computational complexity and performance for the various patterns. This task-level time constraints specification and verification method has been integrated in a time properties verification framework for UML-MARTE safety critical RTS.
AB - Safety critical real-time systems (RTS) have stringent requirements related to the formal specification and verification of system's task-level time constraints. The most common methods used to assess properties in design models rely on the translation from user models to formal verification languages like Time Petri Net (TPN), and on the expression of required properties using Timed Linear Temporal Logic (LTL), Computation Tree Logic (CTL) and μ-calculus. However, these logics are mainly used to assess safety and liveness properties. Their capability for expressing timing properties is more limited and can lead to combinatorial state space explosion problems during model checking. In addition, the existing methods are mainly concerned with logical relations between the events without the consideration of time tolerance. This paper introduces a formal specification and verification method for assessing system's task-level time constraints, including synchronization, coincidence, exclusion, precedence, sub-occurrence and causality, in both finite and infinite time scope. We propose a translation method to formally specify task-level time constraints, and decompose time constraints by a set of event-level time property patterns. These time property patterns are quantitative and independent from both the design modeling language and the verification language. The observer-based model checking method relying on TPN is used to verify these time property patterns. This contribution analyses the method's computational complexity and performance for the various patterns. This task-level time constraints specification and verification method has been integrated in a time properties verification framework for UML-MARTE safety critical RTS.
KW - Formal Specification
KW - MDE
KW - Observer-Based Model Checking
KW - RTS
KW - Task
KW - Time Constraint
KW - Time Petri Net
KW - Time Property Patterns
KW - Verification
UR - https://www.scopus.com/pages/publications/84868276199
U2 - 10.1007/978-3-642-34032-1_16
DO - 10.1007/978-3-642-34032-1_16
M3 - 会议稿件
AN - SCOPUS:84868276199
SN - 9783642340314
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 143
EP - 157
BT - Leveraging Applications of Formal Methods, Verification and Validation
T2 - 5th International Symposium on Leveraging Applications of Formal Methods, Verification and Validation: Technologies for Mastering Change, ISoLA 2012
Y2 - 15 October 2012 through 18 October 2012
ER -