Efficient Atomic Durability on eADR-enabled Persistent Memory

Applications atop persistent memory (PM) require atomic durability to ensure crash consistency. However, existing atomic durability techniques designed for PM systems are based on volatile cache and incur non-negligible performance overhead. Recently, Intel introduces a new feature called eADR (enhanced Asynchronous DRAM Refresh) for Optane PM, which brings an opportunity to build a much more efcient atomic durability system for PM. In this paper, we propose LOAD, a low-overhead atomic durability technique that builds upon eADR. Leveraging the memory hierarchy, LOAD introduces transaction-aware cache (TaC) and device-friendly logging (DFL) to maintain multiple versions of data in a fne-grained and lightweight manner. TaC leverages the memory hierarchy to move the old but valid data from a higher level cache (e.g., L1) to the neighboring lower level (e.g., L2), which retains old version data in caches for crash recovery. DFL records necessary old version data to logs, which ensures transactional data can be atomically evicted from the last level cache to PM. To our knowledge, LOAD is the frst atomic durability mechanism designed for eADR-enabled PM systems. Our experimental evaluation shows that LOAD incurs less than 1% performance overhead and outperforms the state-of-the-art by up to 6.7× on workloads with a large write set.