TY - JOUR
T1 - Design of Ultracompact Content Addressable Memory Exploiting 1T-1MTJ Cell
AU - Zhuo, Cheng
AU - Yang, Zeyu
AU - Ni, Kai
AU - Imani, Mohsen
AU - Luo, Yuxuan
AU - Wang, Shaodi
AU - Zhang, Deming
AU - Yin, Xunzhao
N1 - Publisher Copyright:
© 1982-2012 IEEE.
PY - 2023/5/1
Y1 - 2023/5/1
N2 - Content addressable memories (CAMs) are a promising category of computing-in-memory (CiM) elements that can perform highly parallel and efficient search operations for routers, pattern matching, and other data-intensive applications. Various magnetic tunnel junction (MTJ)-based CAM designs have been proposed to realize zero standby power and high-performance search. However, due to the relatively small tunnel magneto-resistance (TMR) ratio, MTJ-based CAMs require extra transistors and differential MTJ branches to distinguish between the parallel and anti-parallel resistance states, resulting in significant area and energy overhead. In this article, we propose a device-circuit co-design approach for an ultracompact CAM design by only exploiting a 1T-1MTJ structure in each cell. We propose a 2-step search scheme to enable the parallel in-memory search operation across the proposed CAM array and demonstrate the sufficient sensing margin of the array in a successful search operation. Evaluation results suggest that our proposed 1T-1MTJ-based CAM design improves 179×/301× area efficiency compared with the state-of-the-art 15T-4MTJ/20T-6MTJ CAM design. Application benchmarking on hyperdimensional computing (HDC) inference shows a 54.6×/12.8× speedup compared with GPU/20T-6MTJ CAM-based approaches.
AB - Content addressable memories (CAMs) are a promising category of computing-in-memory (CiM) elements that can perform highly parallel and efficient search operations for routers, pattern matching, and other data-intensive applications. Various magnetic tunnel junction (MTJ)-based CAM designs have been proposed to realize zero standby power and high-performance search. However, due to the relatively small tunnel magneto-resistance (TMR) ratio, MTJ-based CAMs require extra transistors and differential MTJ branches to distinguish between the parallel and anti-parallel resistance states, resulting in significant area and energy overhead. In this article, we propose a device-circuit co-design approach for an ultracompact CAM design by only exploiting a 1T-1MTJ structure in each cell. We propose a 2-step search scheme to enable the parallel in-memory search operation across the proposed CAM array and demonstrate the sufficient sensing margin of the array in a successful search operation. Evaluation results suggest that our proposed 1T-1MTJ-based CAM design improves 179×/301× area efficiency compared with the state-of-the-art 15T-4MTJ/20T-6MTJ CAM design. Application benchmarking on hyperdimensional computing (HDC) inference shows a 54.6×/12.8× speedup compared with GPU/20T-6MTJ CAM-based approaches.
KW - Computing-in-memory (CiM)
KW - content addressable memory (CAM)
KW - hyperdimensional computing (HDC)
KW - magnetic tunneling junction (MTJ)
UR - https://www.scopus.com/pages/publications/85137927661
U2 - 10.1109/TCAD.2022.3204515
DO - 10.1109/TCAD.2022.3204515
M3 - 文章
AN - SCOPUS:85137927661
SN - 0278-0070
VL - 42
SP - 1450
EP - 1462
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 5
ER -