Design and reliability analysis of heterogeneous fault- Tolerant on-board computer for micro-satellites

Applying high performance Commercial Off The Shelf (COTS) devices to spacecrafts could highly improve the on-board computer performance and reduce the cost. But fault- Tolerant and protection strategy should be considered and designed to ensure the high reliability of the OBC system. This paper proposed a low-cost, high performance heterogeneous on-board computer (OBC) system that has the fault- Tolerant capability working in the harsh space environment. Firstly, single processor unit (PU) hardware design based on ARM7, software architecture based on real- Time operating system (RTOS) and arbitration mechanism based on 3-level watchdogs are given, and error detection and correction (EDAC) circuit based on FPGA are discussed to protect SRAM cells against single event upset (SEU). Secondly, the heterogeneous fault- Tolerant strategy is presented detailed. Thirdly, the OBC system reliability analysis has been done. The analysis results show that the heterogeneous fault- Tolerant space OBC system based on COTS could meet the requirements of the low-cost, sustainable micro-satellite missions.