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Circuit design and optimization of a synchronous demodulation-based ALIA for capacitive sensors

  • Beihang University

科研成果: 期刊稿件文章同行评审

摘要

This article presents the design and implementation of a high-performance analog lock-in amplifier (ALIA) utilizing synchronous demodulation. We introduce an additional compensation channel to quickly pre-determine the capacitance to be measured for optimal the signal-to-noise ratio. The frequency of the sinusoidal excitation signal can be adjusted within the range of 0.1 Hz to 10 MHz. We optimized the designs of different constituent circuits within the ALIA, including multiplexer-friendly amplifiers, capacitor load drivers, a transimpedance amplifier with parasitic capacitance cancellation and DC error rejection, and an analog front-end. Accordingly, a prototype was subsequently developed and tested to validate the ALIA's design and evaluate its overall performance in terms of DC offset, noise, and thermal drift. Moreover, the proposed scheme demonstrates higher sensitivity for capacitive touch sensors compared to existing solutions. The ALIA exhibits significant potential for use with capacitive sensors requiring precise measurements through synchronous demodulation.

源语言英语
文章编号116300
期刊Measurement: Journal of the International Measurement Confederation
244
DOI
出版状态已出版 - 28 2月 2025

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