@inproceedings{028cbe68d2844229bcb66043be14e13d,
title = "Application of SRIO in radar signal processing",
abstract = "In the Radar signal processing system, SRIO was introduced to meet the demands of data interacting capacity between processors. In this paper, the SRIO transmission was simulated on Modelsim and implemented between FPGA and DSP on the Radar real-time signal processing board. The board contains 2 TMS320C6678 and 2 XC6VSX315T, the SRIO between FPGA and DSP uses ×2 mode, 8b/10b coding, and the transmission rate is 5Gbps. The practical throughput is 7Gbps, comparing to the theoretical throughput of 8Gbps, its efficiency is 87.57\%. The transmission has been used in practical project and worked well.",
keywords = "DSP, FPGA, Radar, SRIO transmission",
author = "Yuxi Zhang and Zhanchao Wang and Yaotian Zhang",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 2016 CIE International Conference on Radar, RADAR 2016 ; Conference date: 10-10-2016 Through 13-10-2016",
year = "2017",
month = oct,
day = "4",
doi = "10.1109/RADAR.2016.8059576",
language = "英语",
series = "2016 CIE International Conference on Radar, RADAR 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2016 CIE International Conference on Radar, RADAR 2016",
address = "美国",
}