An integrated simulation method for built-in test system based on stateflow

To satisfy the application requirements of built-in test (BIT) technology in equipment design for testability and prognostic and health management (PHM), an integrated simulation method for BIT system based on stateflow is proposed. Based on the analysis of the operating modes of BIT system, an integrated simulation principle of BIT system is given. Main simulation elements, such as fault-interference superposition insertion, fault detection and fault isolation, are analyzed with their stateflow models established. The integrated modeling and simulation process of BIT system is presented, and a design flow of an integrated simulation insertion data set is given. Finally the BIT system of a typical avionics power board is applied to the integrated simulation method, and simulation results are used to evaluate the capabilities of fault detection, fault isolation and false alarm rejection of the BIT system.