摘要
Faced with the high computational complexity of UAV SAR raw signal simulators, a multi-FPGA system is developed. The system is based on a time-domain raw signal algorithm which can compute in real time and can be used for closed-loop simulation. In order to improve the efficiency of the SAR slant range computing, a modified non-restoring squire root algorithm for FPGA is designed. An improved method is presented to perform coherent accumulation of raw signal to decrease memory cost. The pipelined FFT and IFFT are used to compute the convolution in order to reduce delay. The SAR raw signal generation system is implemented and verified with real-time performance. It can simulate an imaging scene size of 640 * 640 point scatters with a PRF higher than 40 kHz.
| 源语言 | 英语 |
|---|---|
| 文章编号 | 20140168 |
| 期刊 | IEICE Electronics Express |
| 卷 | 11 |
| 期 | 11 |
| DOI | |
| 出版状态 | 已出版 - 19 3月 2014 |
指纹
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