@inproceedings{682e554dd913494c992b82e799f013d1,
title = "A multi-level collaboration low-power design based on embedded system",
abstract = "This essay provides a multi-level collaboration low-power design based on embedded processor, builds SoC (System-on-Chip) and designs a low-power SoC by register level, system level and gate level. The designed clock gating module, power management module and system program coordination can be used to realize the sleep and wake up functions on SoC. In order to realize a multi-level collaboration low-power designing, gating clock circuit can be used in circuit designing.",
keywords = "clock gating, dynamic power manager, low-power, multi-level",
author = "Xiang Wang and Lin Li and Longbin Zhang and Weike Wang and Rong Zhang and Yi Zhang and Quanneng Shen",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 28th IEEE International System on Chip Conference, SOCC 2015 ; Conference date: 08-09-2015 Through 11-09-2015",
year = "2016",
month = feb,
day = "12",
doi = "10.1109/SOCC.2015.7406937",
language = "英语",
series = "International System on Chip Conference",
publisher = "IEEE Computer Society",
pages = "186--190",
editor = "Thomas Buchner and Danella Zhao and Karan Bhatia and Ramalingam Sridhar",
booktitle = "Proceedings - 28th IEEE International System on Chip Conference, SOCC 2015",
address = "美国",
}