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A high reliability CMOS implantable interface for wireless neural recording microsystem

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

A novel wireless implantable microsystem using a high-reliability digital technology is proposed for recording the hybrid neural signal. In order to enhance the neural recording intactness, we employ a kind of high-reliability design architecture, which includes a self-check circuit and a transmitter channel error check circuit. The proposed high-reliability structure can identify possible faults in any implantable interface. A dynamical pattern double channel circuit is designed for the signal synchronous transfer in this interface. A low-power self-check circuit is designed too. The high-reliability and lowpower implantable interface using a full-CMOS technology has been designed and verified. A prototype has been implemented, whose correct operation has been verified by mean of postlayout simulations and experimental measurements.

源语言英语
主期刊名2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
DOI
出版状态已出版 - 2008
活动2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC - Hong Kong, 中国
期限: 8 12月 200810 12月 2008

出版系列

姓名2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

会议

会议2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC
国家/地区中国
Hong Kong
时期8/12/0810/12/08

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