@inproceedings{f3ba053f59714ba0a8588cbe6b535562,
title = "A Chip-level Optical Interconnect for CPU",
abstract = "A component of 100Gbps chip-level optical interconnect is implemented by developing a PHY integrated with an optic transceiver through co-package. It achieved 1/3 power consumption, 1/2 area compared with board-level interconnect. It can be a building block for integration with CPU to implement optical I/O.",
author = "Qinfen Hao and Kai Hao and Haiyun Xue and Meng Han and Nan Qi and Kunming Zhang and Xingmao Niu and Limin Xiao and Dongrui Fan",
note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 IEEE Photonics Conference, IPC 2020 ; Conference date: 28-09-2020 Through 01-10-2020",
year = "2020",
month = sep,
doi = "10.1109/IPC47351.2020.9252321",
language = "英语",
series = "2020 IEEE Photonics Conference, IPC 2020 - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2020 IEEE Photonics Conference, IPC 2020 - Proceedings",
address = "美国",
}