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A 6.86Tb/s Bandwidth SOT-MRAM Sensing Scheme with Configurable Full-Column Over Frequency Technique for Near Memory Computing

  • Beihang University

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

The proliferation of multimodal systems, which heavily rely on efficient visual backbone networks like Convolutional Neural Networks (CNNs), is driving the adoption of Computing-in-Memory (CIM) architectures for edge deployment. Magnetoresistive RAM (MRAM) is an attractive weight storage medium for such systems due to its non-volatility, inherent radiation hardness, and high-speed read/write potential. However, the computational performance of digital MRAM-CIM chips is bottlenecked by the MRAM read bandwidth, thereby precluding full utilization of its non-volatility and limiting overall energy efficiency, especially as network depth scales. To this end, we introduce a compact, dual-path-optimized full-column-readout sense amplifier (SA) for reliable reading, complemented by a stage-aware over-frequency scheme with algorithm retraining to preserve inferency accuracy. Simulation results of our Spin-Orbit-Torque (SOT)-MRAM design in a 32-channel CIM architecture show a bandwidth of 6.86 Tb/s and a read energy efficiency of 34.5 fJ/bit. This represents a 33.9× improvement in normalized bandwidth over previous cutting-edge designs.

源语言英语
主期刊名ISCAS 2026 - 2026 IEEE International Symposium on Circuits and Systems
出版商Institute of Electrical and Electronics Engineers Inc.
2118-2122
页数5
ISBN(电子版)9798331577698
DOI
出版状态已出版 - 2026
活动2026 IEEE International Symposium on Circuits and Systems, ISCAS 2026 - Shanghai, 中国
期限: 24 5月 202627 5月 2026

出版系列

姓名Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(印刷版)0271-4310

会议

会议2026 IEEE International Symposium on Circuits and Systems, ISCAS 2026
国家/地区中国
Shanghai
时期24/05/2627/05/26

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