纳米银微焊点阵列的超快激光图形化沉积及其芯片封装研究

With the continuous development of integrated circuit chip packaging in the direction of miniaturization and integration, the performance of lead-free tin-based solder can no longer meet the current requirements. A novel technology of pulsed laser patterning deposition of metal nanoparticles is proposed to prepare small-sized and fine pitch bumps array, which is used to replace the traditional tin-based solder bumps in integrated circuit chip packaging. In order to verify the feasibility of this process in integrated circuit chip packaging, the patterning deposited nano-silver bumps array is used to connect Si chip and direct bonding copper (DBC) substrate. The results show that the silver bumps array with feature size of 100 μm can be deposited by PI tape mask successfully, with a maximum height of 50 μm and a tapered morphology. The tapered morphology is mainly attribute to the accumulation of nanoparticles on the inner wall of mask holes during deposition causing the decreasing of hole size and the depth of the mask hole hinders the deposition of nanoparticles on the bottom edge of the hole. Under the hot-press sintering parameters of 250 ℃-3 MPa-10 min, the joints are successfully prepared, with dense microstructure in the bumps center and loose in the edge. The shear strength of the joint increases with the deposition height of sliver bumps, and the strength reaches 20 MPa with a 50 μm bump height. The shear fracture mainly occurs at the interface between Ag bumps and DBC substrate, and the fracture mode is ductile fracture.