Variation-tolerant and disturbance-free sensing circuit for deep nanometer STT-MRAM

This paper presents a high reliability sensing circuit for the deep nanometer spin-transfer torque magnetic random-access memory (STT-MRAM). This sensing circuit, using a triple-stage sensing operation and source follower charge transfer amplification, is able to tolerate mostly the process, voltage, and temperature variations, thus improving greatly the sensing margin. Meanwhile, it clamps the bit-line voltage to a predefined small bias voltage to avoid any read disturbance. With the STMicroelectronics CMOS 40-nm design kit and a precise STT-MTJ compact model, Monte-Carlo simulations have been performed to evaluate its sensing reliability performance.