Uniformity of device performance improvement for the SOT-MRAM by optimizing the lithography process at 200-mm-wafer manufacturing platform

  • Bowen Man
  • , Xiaowei Yang
  • , Qingsong Zhao
  • , Cong Zhang
  • , Shuqin Lv
  • , Shiyang Lu
  • , Kaihua Cao*
  • , Hongxi Liu*
  • , Gefei Wang
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

We examined the influence of process uniformity on the device performance for the spin-orbit torque (SOT) magnetic random access memory (MRAM) devices. By optimizing the lithography process through changing the multi-energies exposure compensation and pretreatment in developing, we demonstrated 1.6 times sigma improvement of the critical dimensions (CD), leading to 49.5%, 54.2%, and 63.2% sigma% reduction for SOT channel resistance (Rb), magnetic tunnel junction (MTJ) resistance (Rmin) and switching current (IC) respectively. These promising results will help to deliver SOT-MRAM to the mass manufacturing in the semiconductor industry.

Original languageEnglish
Title of host publicationIWAPS 2022 - 2022 6th International Workshop on Advanced Patterning Solutions
EditorsYayi Wei, Tianchun Ye
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350397666
DOIs
StatePublished - 2022
Event6th International Workshop on Advanced Patterning Solutions, IWAPS 2022 - Virtual, Online, China
Duration: 21 Oct 202222 Oct 2022

Publication series

NameIWAPS 2022 - 2022 6th International Workshop on Advanced Patterning Solutions

Conference

Conference6th International Workshop on Advanced Patterning Solutions, IWAPS 2022
Country/TerritoryChina
CityVirtual, Online
Period21/10/2222/10/22

Keywords

  • MTJ
  • Multi-energies exposure compensation
  • SOT-MRAM
  • Uniformity.

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