Time-triggered communication scheduling method for off-chip integrated interconnection

The advanced distributed integrated avionics system needs to achieve information integration across computing architectures. Integrated interconnection among micro-smart devices is thus required. By constructing an off-chip integrated interconnection structure with the open interface, a corresponding time-triggered message scheduling method is proposed. First, the off-chip interconnection model and the Time-Triggered (TT) communication model are established, and the load balancing path selection method is given. Then, the feasible value of the waiting time is calculated according to the flow's transmission offset of chips in the transmission path. The genetic algorithm is used to adjust the phase of scheduling tables of chips' send ports, whereby the flow's transmission offset can be updated and the maximum waiting time of the worst case can be shortened. The time-triggered scheduling table with global optimization significance can be obtained. Compared with the methods of generating TT scheduling tables using the SMT formalizer, such as Yices, this method does not work for a long time without stopping and can not cause undefined problems. The case study shows that the scheduler scale of this method increases by at least 30% for both symmetric and asymmetric structures. In addition, the ratio of the waiting time to the time period is taken as the normalized transmission delay metric. The case study also shows that the propagation delay value deduced by this method reduces to less than 2% of the one deduced by existing task-based scheduling methods.