TY - GEN
T1 - The Systematic Thinking Ability of Hardware/Software Co-design using FPGA
AU - Li, Ying
AU - Zhang, Jiong
AU - Mitra, Hritik
AU - Yu, Shicheng
N1 - Publisher Copyright:
© 2020 IEEE.
PY - 2020/10/21
Y1 - 2020/10/21
N2 - This Research-to-Practice Work-In-Progress paper proposes a state-of-the-art method of hardware-software co-design (HSC) based on FPGA. The main contributions were: (1) Optimizing Curriculum System from hierarchical structure to vertical structure. The traditional computer courses are taught horizontally and independently which ignores the connection between software and hardware. Therefore, we adopt a coherent curriculum and teaching is vertically structured and logically sequenced to reconstruct the contents from loose coupling to tight coupling; (2) Optimizing teaching process from Software-Hardware to Hardware-Interface-Software. We establish a closed-loop teaching framework by designing some tightly coupled projects to integrate hardware, interface and software together; (3) Optimizing teaching method from complex to simple. Complex teaching tries to entirely develop a real system in one time but it is too difficult to implement. Based upon the theories of Occam's razor and Separation of Concern, simple teaching eliminates unnecessary knowledge and decouples the complex system into single and simple modules; (4) Optimizing teaching objectives from solving basic academic problems to solving complex engineering problems. To train engineering talents, we use industrial methods to solve industrial problems which meet industry standards. Finally, evaluation based on a capability-maturity model like CDIO-CMM (CDIO Capability-Maturity Model) was done by means survey questionnaire and the results indicate hardware-software co-design can effectively improve students' ability of system design and the proportion of students at advanced level is increased from 13% to 37%.
AB - This Research-to-Practice Work-In-Progress paper proposes a state-of-the-art method of hardware-software co-design (HSC) based on FPGA. The main contributions were: (1) Optimizing Curriculum System from hierarchical structure to vertical structure. The traditional computer courses are taught horizontally and independently which ignores the connection between software and hardware. Therefore, we adopt a coherent curriculum and teaching is vertically structured and logically sequenced to reconstruct the contents from loose coupling to tight coupling; (2) Optimizing teaching process from Software-Hardware to Hardware-Interface-Software. We establish a closed-loop teaching framework by designing some tightly coupled projects to integrate hardware, interface and software together; (3) Optimizing teaching method from complex to simple. Complex teaching tries to entirely develop a real system in one time but it is too difficult to implement. Based upon the theories of Occam's razor and Separation of Concern, simple teaching eliminates unnecessary knowledge and decouples the complex system into single and simple modules; (4) Optimizing teaching objectives from solving basic academic problems to solving complex engineering problems. To train engineering talents, we use industrial methods to solve industrial problems which meet industry standards. Finally, evaluation based on a capability-maturity model like CDIO-CMM (CDIO Capability-Maturity Model) was done by means survey questionnaire and the results indicate hardware-software co-design can effectively improve students' ability of system design and the proportion of students at advanced level is increased from 13% to 37%.
KW - Complex Engineering Problems
KW - Hardware/Software Co-design
KW - Lightweight Teaching
KW - Vertical Teaching
UR - https://www.scopus.com/pages/publications/85098556542
U2 - 10.1109/FIE44824.2020.9274284
DO - 10.1109/FIE44824.2020.9274284
M3 - 会议稿件
AN - SCOPUS:85098556542
T3 - Proceedings - Frontiers in Education Conference, FIE
BT - 2020 IEEE Frontiers in Education Conference, FIE 2020 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 IEEE Frontiers in Education Conference, FIE 2020
Y2 - 21 October 2020 through 24 October 2020
ER -