The methods of FPGA software verification

Zheng Ding; Yichen Wang; Xueyi Zou

doi:10.1109/CSAE.2011.5952639

The methods of FPGA software verification

Zheng Ding^*
, Yichen Wang
, Xueyi Zou

^*Corresponding author for this work

School of Reliability and Systems Engineering

Beihang University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

Abstract

With the FPGA widely applied in embedded system, more and more quality problems related to FPGA began to expose. The verification efficiency of FPGA software needs to be improved urgently. This paper started with the concept of FPGA software, proposing two methods: testbench and assertion analysis to solve the problem of FPGA software verification on the basis of comparing with traditional software. It cited the example of a RISC (Reduced Instruction Set Computer) CPU, described the implementation process of FPGA software verification methods from establishing simulation environment to verifying CPU function of reading and writing memory, and finally validated the effectiveness of the methods.

Original language	English
Title of host publication	Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011
Pages	86-89
Number of pages	4
DOIs	https://doi.org/10.1109/CSAE.2011.5952639
State	Published - 2011
Event	2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011 - Shanghai, China Duration: 10 Jun 2011 → 12 Jun 2011

Publication series

Name	Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011
Volume	3

Conference

Conference	2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011
Country/Territory	China
City	Shanghai
Period	10/06/11 → 12/06/11

Keywords

FPGA software
assertion verification
simulation test
verification methods

Access to Document

10.1109/CSAE.2011.5952639

Cite this

Ding, Z., Wang, Y., & Zou, X. (2011). The methods of FPGA software verification. In Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011 (pp. 86-89). Article 5952639 (Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011; Vol. 3). https://doi.org/10.1109/CSAE.2011.5952639

@inproceedings{eb3e9b2cc4d64f5e8b2fa95e39a8a76a,

title = "The methods of FPGA software verification",

abstract = "With the FPGA widely applied in embedded system, more and more quality problems related to FPGA began to expose. The verification efficiency of FPGA software needs to be improved urgently. This paper started with the concept of FPGA software, proposing two methods: testbench and assertion analysis to solve the problem of FPGA software verification on the basis of comparing with traditional software. It cited the example of a RISC (Reduced Instruction Set Computer) CPU, described the implementation process of FPGA software verification methods from establishing simulation environment to verifying CPU function of reading and writing memory, and finally validated the effectiveness of the methods.",

keywords = "FPGA software, assertion verification, simulation test, verification methods",

author = "Zheng Ding and Yichen Wang and Xueyi Zou",

year = "2011",

doi = "10.1109/CSAE.2011.5952639",

language = "英语",

isbn = "9781424487257",

series = "Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011",

pages = "86--89",

booktitle = "Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011",

note = "2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011 ; Conference date: 10-06-2011 Through 12-06-2011",

}

Ding, Z, Wang, Y & Zou, X 2011, The methods of FPGA software verification. in Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011., 5952639, Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011, vol. 3, pp. 86-89, 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011, Shanghai, China, 10/06/11. https://doi.org/10.1109/CSAE.2011.5952639

The methods of FPGA software verification. / Ding, Zheng; Wang, Yichen; Zou, Xueyi.
Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011. 2011. p. 86-89 5952639 (Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011; Vol. 3).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - The methods of FPGA software verification

AU - Ding, Zheng

AU - Wang, Yichen

AU - Zou, Xueyi

PY - 2011

Y1 - 2011

N2 - With the FPGA widely applied in embedded system, more and more quality problems related to FPGA began to expose. The verification efficiency of FPGA software needs to be improved urgently. This paper started with the concept of FPGA software, proposing two methods: testbench and assertion analysis to solve the problem of FPGA software verification on the basis of comparing with traditional software. It cited the example of a RISC (Reduced Instruction Set Computer) CPU, described the implementation process of FPGA software verification methods from establishing simulation environment to verifying CPU function of reading and writing memory, and finally validated the effectiveness of the methods.

AB - With the FPGA widely applied in embedded system, more and more quality problems related to FPGA began to expose. The verification efficiency of FPGA software needs to be improved urgently. This paper started with the concept of FPGA software, proposing two methods: testbench and assertion analysis to solve the problem of FPGA software verification on the basis of comparing with traditional software. It cited the example of a RISC (Reduced Instruction Set Computer) CPU, described the implementation process of FPGA software verification methods from establishing simulation environment to verifying CPU function of reading and writing memory, and finally validated the effectiveness of the methods.

KW - FPGA software

KW - assertion verification

KW - simulation test

KW - verification methods

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DO - 10.1109/CSAE.2011.5952639

M3 - 会议稿件

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SN - 9781424487257

T3 - Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011

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BT - Proceedings - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011

T2 - 2011 IEEE International Conference on Computer Science and Automation Engineering, CSAE 2011

Y2 - 10 June 2011 through 12 June 2011

ER -

The methods of FPGA software verification

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Keywords

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