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The FPGA Implementation of Low-Altitude and Slow-Speed Small Target Detection

  • Beihang University
  • Xidian University

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In recent years, there are more and more low-altitude slow-speed aircrafts, like unmanned rotorcraft and powered parachute. Whether in the military or civilian fields, it is necessary to detect and track these targets. Hardware implementation of a low-altitude and slow-speed small (LSS) target detection method is presented in this paper. The spectrum zoom processing method is the core of this algorithm. There are many devices available to accomplish the LSS target detection algorithm, like GPU, DSP. In consideration of the fixed and repetitive operations at high data rate in this algorithm, the FPGA implementation scheme is a better choice to construct the processing system. We implement the LSS target detection in FPGA. The spectrum zoom processing operation is implemented by parallel group of FFT magnitude calculation modules, and the system is built on a processing board whose core is the XV7K325T chip.

Original languageEnglish
Title of host publicationICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728123455
DOIs
StatePublished - Dec 2019
Event2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019 - Chongqing, China
Duration: 11 Dec 201913 Dec 2019

Publication series

NameICSIDP 2019 - IEEE International Conference on Signal, Information and Data Processing 2019

Conference

Conference2019 IEEE International Conference on Signal, Information and Data Processing, ICSIDP 2019
Country/TerritoryChina
CityChongqing
Period11/12/1913/12/19

Keywords

  • FFT
  • FPGA
  • LSS targets
  • Spectrum zoom

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