Synchronous full-adder based on complementary resistive switching memory cells

Y. Zhang; E. Y. Deng; J. O. Klein; D. Querlioz; D. Ravelosona; C. Chappert; W. S. Zhao; M. Moreau; J. M. Portal; M. Bocquet; H. Aziza; D. Deleruyelle; C. Muller

doi:10.1109/NEWCAS.2013.6573578

Synchronous full-adder based on complementary resistive switching memory cells

Y. Zhang
, E. Y. Deng
, J. O. Klein
, D. Querlioz
, D. Ravelosona
, C. Chappert
, W. S. Zhao
, M. Moreau
, J. M. Portal
, M. Bocquet
, H. Aziza
, D. Deleruyelle
, C. Muller

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >10¹²), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the nonvolatility and 3D integration of NVM, both standby power during 'idle' state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.

Original language	English
Title of host publication	2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013
DOIs	https://doi.org/10.1109/NEWCAS.2013.6573578
State	Published - 2013
Externally published	Yes
Event	2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013 - Paris, France Duration: 16 Jun 2013 → 19 Jun 2013

Publication series

Name	2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013

Conference

Conference	2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013
Country/Territory	France
City	Paris
Period	16/06/13 → 19/06/13

Access to Document

10.1109/NEWCAS.2013.6573578

Cite this

Zhang, Y., Deng, E. Y., Klein, J. O., Querlioz, D., Ravelosona, D., Chappert, C., Zhao, W. S., Moreau, M., Portal, J. M., Bocquet, M., Aziza, H., Deleruyelle, D., & Muller, C. (2013). Synchronous full-adder based on complementary resistive switching memory cells. In 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013 Article 6573578 (2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013). https://doi.org/10.1109/NEWCAS.2013.6573578

@inproceedings{ad89683a5317428b9425372954b0ebca,

title = "Synchronous full-adder based on complementary resistive switching memory cells",

abstract = "Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >1012), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the nonvolatility and 3D integration of NVM, both standby power during 'idle' state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.",

author = "Y. Zhang and Deng, \{E. Y.\} and Klein, \{J. O.\} and D. Querlioz and D. Ravelosona and C. Chappert and Zhao, \{W. S.\} and M. Moreau and Portal, \{J. M.\} and M. Bocquet and H. Aziza and D. Deleruyelle and C. Muller",

year = "2013",

doi = "10.1109/NEWCAS.2013.6573578",

language = "英语",

isbn = "9781479906185",

series = "2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013",

booktitle = "2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013",

note = "2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013 ; Conference date: 16-06-2013 Through 19-06-2013",

}

Zhang, Y, Deng, EY, Klein, JO, Querlioz, D, Ravelosona, D, Chappert, C, Zhao, WS, Moreau, M, Portal, JM, Bocquet, M, Aziza, H, Deleruyelle, D & Muller, C 2013, Synchronous full-adder based on complementary resistive switching memory cells. in 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013., 6573578, 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013, Paris, France, 16/06/13. https://doi.org/10.1109/NEWCAS.2013.6573578

Synchronous full-adder based on complementary resistive switching memory cells. / Zhang, Y.; Deng, E. Y.; Klein, J. O. et al.
2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013. 2013. 6573578 (2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Synchronous full-adder based on complementary resistive switching memory cells

AU - Zhang, Y.

AU - Deng, E. Y.

AU - Klein, J. O.

AU - Querlioz, D.

AU - Ravelosona, D.

AU - Chappert, C.

AU - Zhao, W. S.

AU - Moreau, M.

AU - Portal, J. M.

AU - Bocquet, M.

AU - Aziza, H.

AU - Deleruyelle, D.

AU - Muller, C.

PY - 2013

Y1 - 2013

N2 - Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >1012), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the nonvolatility and 3D integration of NVM, both standby power during 'idle' state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.

AB - Emerging non-volatile memories (NVM) such as STT-MRAM and OxRRAM are under intense investigation by both academia and industries. They are based on resistive switching mechanisms and promise advantageous performances in terms of access speed, power consumption and endurance (i.e. >1012), surpassing mainstream flash memories. This paper presents a non-volatile full-adder design based on complementary resistive switching memory cells and validates it through two NVM technologies: STT-MRAM and OxRRAM on 40 nm node. This architecture allows low power consumption. Thanks to the nonvolatility and 3D integration of NVM, both standby power during 'idle' state and data transfer power can be reduced. Using a low changing frequency can also control the switching power of NVM. The complementary cells and parallel data sensing enable fast computation and high reliability.

UR - https://www.scopus.com/pages/publications/84883476190

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DO - 10.1109/NEWCAS.2013.6573578

M3 - 会议稿件

AN - SCOPUS:84883476190

SN - 9781479906185

T3 - 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013

BT - 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013

T2 - 2013 IEEE 11th International New Circuits and Systems Conference, NEWCAS 2013

Y2 - 16 June 2013 through 19 June 2013

ER -

Synchronous full-adder based on complementary resistive switching memory cells

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