Abstract
This paper demonstrates the implementation of a static random access memory (SRAM) cell that is suitable for low-voltage organic thin-film transistors (OTFTs). SRAM is an essential component in electronic systems which can store data or instructions for various applications. We use p-type OTFTs for the access transistors to gain higher areal efficiency and better robustness than those of conventional OTFT-based SRAM construction. We verify the stability of the proposed SRAM cell and optimize the transistor sizes through SPICE simulation. Using test chip measurement, the correct write/read operation of the proposed SRAM cell is confirmed under a 10× imbalance of the on-current ratio. The proposed SRAM cell achieves a 50% area reduction and a 2.5× static noise margin improvement, compared to the existing OTFT SRAM cell design.
| Original language | English |
|---|---|
| Article number | SBBG04 |
| Journal | Japanese Journal of Applied Physics |
| Volume | 60 |
| Issue number | SB |
| DOIs | |
| State | Published - May 2021 |
| Externally published | Yes |
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