Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement

Menglin Han; Hao Cai; Jun Yang; Lirida Naviner; You Wang; Weisheng Zhao

doi:10.1109/APCCAS.2018.8605603

Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement

Menglin Han
, Hao Cai
, Jun Yang
, Lirida Naviner
, You Wang
, Weisheng Zhao

School of Integrated Circuit Science and Engineering

Southeast University, Nanjing
Université Paris-Saclay
Beihang University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

Spin transfer torque magnetic random access memory (STT-MRAM) is one of the most promising candidates for the next-generation nonvolatile memory (NVM). However, as the process dimension and supply voltage continue to decrease, the yield of the sensing amplifier is reduced. In this work, the proposed sensing block with high margin, speed and stability (HMSS) with performance enhancement can be applied to variability emphasized MRAM design. The sensing circuit is implemented with a 28-nm CMOS process and a perpendicular magnetic anisotropy (PMA) magnetic tunnel junctions (p-MTJ) based compact model. Working at low voltage with high speed and yield is the main goal of the designed HMSS sensing amplifier (HMSS-SA). For near-Threshold operation, at the voltage of 700 mV, the yield of HMSS-SA is 2.06x by transistor sizing, reaching 4.1%. And the speed is increased by 33% by transistor sizing, reaching 0.09 ns with the power of 18.27 μW. The performance of HMSS drops by 0.85% yield and 0.05 ns speed at 0.7 V compared to the 1 V supply voltage which shows that the proposed HMSS-SA has excellent performance at low supply voltages.

Original language	English
Title of host publication	2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	386-389
Number of pages	4
ISBN (Electronic)	9781538682401
DOIs	https://doi.org/10.1109/APCCAS.2018.8605603
State	Published - 2 Jul 2018
Event	14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 - Chengdu, China Duration: 26 Oct 2018 → 30 Oct 2018

Publication series

Name	2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018

Conference

Conference	14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018
Country/Territory	China
City	Chengdu
Period	26/10/18 → 30/10/18

Keywords

STT-MRAM
low V performance
process variation
sensing margin
stability

Access to Document

10.1109/APCCAS.2018.8605603

Cite this

Han, M., Cai, H., Yang, J., Naviner, L., Wang, Y., & Zhao, W. (2018). Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement. In 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 (pp. 386-389). Article 8605603 (2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APCCAS.2018.8605603

@inproceedings{5056f8d5fb8f4735818f441aad76e468,

title = "Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement",

abstract = "Spin transfer torque magnetic random access memory (STT-MRAM) is one of the most promising candidates for the next-generation nonvolatile memory (NVM). However, as the process dimension and supply voltage continue to decrease, the yield of the sensing amplifier is reduced. In this work, the proposed sensing block with high margin, speed and stability (HMSS) with performance enhancement can be applied to variability emphasized MRAM design. The sensing circuit is implemented with a 28-nm CMOS process and a perpendicular magnetic anisotropy (PMA) magnetic tunnel junctions (p-MTJ) based compact model. Working at low voltage with high speed and yield is the main goal of the designed HMSS sensing amplifier (HMSS-SA). For near-Threshold operation, at the voltage of 700 mV, the yield of HMSS-SA is 2.06x by transistor sizing, reaching 4.1\%. And the speed is increased by 33\% by transistor sizing, reaching 0.09 ns with the power of 18.27 μW. The performance of HMSS drops by 0.85\% yield and 0.05 ns speed at 0.7 V compared to the 1 V supply voltage which shows that the proposed HMSS-SA has excellent performance at low supply voltages.",

keywords = "STT-MRAM, low V performance, process variation, sensing margin, stability",

author = "Menglin Han and Hao Cai and Jun Yang and Lirida Naviner and You Wang and Weisheng Zhao",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018 ; Conference date: 26-10-2018 Through 30-10-2018",

year = "2018",

month = jul,

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doi = "10.1109/APCCAS.2018.8605603",

language = "英语",

series = "2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018",

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Han, M, Cai, H, Yang, J, Naviner, L, Wang, Y & Zhao, W 2018, Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement. in 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018., 8605603, 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Institute of Electrical and Electronics Engineers Inc., pp. 386-389, 14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018, Chengdu, China, 26/10/18. https://doi.org/10.1109/APCCAS.2018.8605603

Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement. / Han, Menglin; Cai, Hao; Yang, Jun et al.
2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 386-389 8605603 (2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement

AU - Han, Menglin

AU - Cai, Hao

AU - Yang, Jun

AU - Naviner, Lirida

AU - Wang, You

AU - Zhao, Weisheng

PY - 2018/7/2

Y1 - 2018/7/2

N2 - Spin transfer torque magnetic random access memory (STT-MRAM) is one of the most promising candidates for the next-generation nonvolatile memory (NVM). However, as the process dimension and supply voltage continue to decrease, the yield of the sensing amplifier is reduced. In this work, the proposed sensing block with high margin, speed and stability (HMSS) with performance enhancement can be applied to variability emphasized MRAM design. The sensing circuit is implemented with a 28-nm CMOS process and a perpendicular magnetic anisotropy (PMA) magnetic tunnel junctions (p-MTJ) based compact model. Working at low voltage with high speed and yield is the main goal of the designed HMSS sensing amplifier (HMSS-SA). For near-Threshold operation, at the voltage of 700 mV, the yield of HMSS-SA is 2.06x by transistor sizing, reaching 4.1%. And the speed is increased by 33% by transistor sizing, reaching 0.09 ns with the power of 18.27 μW. The performance of HMSS drops by 0.85% yield and 0.05 ns speed at 0.7 V compared to the 1 V supply voltage which shows that the proposed HMSS-SA has excellent performance at low supply voltages.

AB - Spin transfer torque magnetic random access memory (STT-MRAM) is one of the most promising candidates for the next-generation nonvolatile memory (NVM). However, as the process dimension and supply voltage continue to decrease, the yield of the sensing amplifier is reduced. In this work, the proposed sensing block with high margin, speed and stability (HMSS) with performance enhancement can be applied to variability emphasized MRAM design. The sensing circuit is implemented with a 28-nm CMOS process and a perpendicular magnetic anisotropy (PMA) magnetic tunnel junctions (p-MTJ) based compact model. Working at low voltage with high speed and yield is the main goal of the designed HMSS sensing amplifier (HMSS-SA). For near-Threshold operation, at the voltage of 700 mV, the yield of HMSS-SA is 2.06x by transistor sizing, reaching 4.1%. And the speed is increased by 33% by transistor sizing, reaching 0.09 ns with the power of 18.27 μW. The performance of HMSS drops by 0.85% yield and 0.05 ns speed at 0.7 V compared to the 1 V supply voltage which shows that the proposed HMSS-SA has excellent performance at low supply voltages.

KW - STT-MRAM

KW - low V performance

KW - process variation

KW - sensing margin

KW - stability

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U2 - 10.1109/APCCAS.2018.8605603

DO - 10.1109/APCCAS.2018.8605603

M3 - 会议稿件

AN - SCOPUS:85062235241

T3 - 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018

SP - 386

EP - 389

BT - 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 14th IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018

Y2 - 26 October 2018 through 30 October 2018

ER -

Han M, Cai H, Yang J, Naviner L, Wang Y, Zhao W. Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement. In 2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 386-389. 8605603. (2018 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2018). doi: 10.1109/APCCAS.2018.8605603

Stability and Variability Emphasized STT-MRAM Sensing Circuit with Performance Enhancement

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Keywords

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