SM4 算法快速软件实现

The SM4 algorithm is China's national standard of symmetric block cipher, and its efficiency is one of the most important features. So far, insufficient work has been done on fast software implementation of SM4 algorithm. Exploiting bit-slicing technique and SIMD (single instruction multiple data) instruction set AVX2, this paper presents a fast implementation of SM4 algorithm which can process 256 blocks in parallel via 256 bits YMM registers. Firstly, a new selection function is constructed based on existing ones. Then, the logic circuit generating algorithm corresponding to the selection function is improved. Furthermore, the number of gates of the S box is reduced from 3000 to 497. Using an Intel Core i7-7700HQ(Kabylake)@2.80 GHz processor, the software performance is 2580 Mbps, 43% ahead of SM4's benchmark on software implementation which is 1795 Mbps (Intel Core i7-5500U (Broadwell-U) @2.40 GHz). Bit-sliced implementation does not require to store a table in memory or in cache, hence it is immune to side channel attacks such as cache attack and timing attack. The improved method presented in this paper can be implemented on various computing platforms, which means that it is suitable to X86 architecture with extended instruction set AVX2, and is also suitable to embedded systems with RISC instructions and limited resource. Note that the improved selection function and the improved logic circuit generating algorithm are a generic approach, which can be used to the reduction of general logical functions.