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Single DSP hardware design in real-time multi-constellation satellite navigation receiver

  • Jin Tian*
  • , Shi Lin
  • *Corresponding author for this work
  • Beihang University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Traditional satellite navigation receivers usually depend on FPGA chips or ASIC chips, which lack flexibility and multiple constellation support. The paper presents a single DSP multi-constellation satellite navigation receiver hardware design method, and discusses signal sample, buffer and output technology. Furthermore, multi-constellation task scheduler is also discussed. Based on TMS320C6416, a prototype of realtime multi-constellation satellite navigation software receiver is implemented. The experimental results show that the receiver platform implemented in this scheme could realize the functions of the real-time receiver very well, and can be further extended to multi-constellation navigation receiver later.

Original languageEnglish
Title of host publicationProceedings - IEEE 9th International Conference on Computer and Information Technology, CIT 2009
Pages369-373
Number of pages5
DOIs
StatePublished - 2009
EventIEEE 9th International Conference on Computer and Information Technology, CIT 2009 - Xiamen, China
Duration: 11 Oct 2009 → 14 Oct 2009

Publication series

NameProceedings - IEEE 9th International Conference on Computer and Information Technology, CIT 2009
Volume2

Conference

ConferenceIEEE 9th International Conference on Computer and Information Technology, CIT 2009
Country/TerritoryChina
CityXiamen
Period11/10/09 → 14/10/09

Keywords

  • Digital signal processor
  • Multi-constellation satellite navigation
  • Software receiver

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