Simulation method for PBIT fault detection and false alarm reduction based on stateflow

  • Haiwei Li*
  • , Junyou Shi
  • , Hongtao Liu
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Aiming at the application requirements of built-in test (BIT) technology in equipment design for testability and prognostic and health management (PHM), a method of periodic BIT (PBIT) simulation based on stateflow was proposed. The fault detection features and fault alarms problem were analyzed, and the simulation principle of PBIT was given. Based on the simulation of power-on BIT (POBIT), the simulation elements of PBIT were analyzed, as well as the stateflow chart objects simulation mode of those elements, and the modeling of faults injection, interferences injection and false alarm reduction measures were implemented. Finally, the flow of modeling and simulation for PBIT was given, including the flow of simulation input dataset design. A typical avionic module PBIT was taken as the case, the stateflow model of power board, interferences, PBITs and false alarm reduction measures were built. The simulation results show that this method contributes to realizing the dynamic logic process simulation of PBIT in fault detection and false alarm reduction effectively.

Original languageEnglish
Pages (from-to)983-989
Number of pages7
JournalBeijing Hangkong Hangtian Daxue Xuebao/Journal of Beijing University of Aeronautics and Astronautics
Volume39
Issue number7
StatePublished - Jul 2013

Keywords

  • False alarm reduction
  • Fault detection
  • Interference injection
  • Periodic built-in test (PBIT)
  • Simulation
  • Stateflow

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