Abstract
Content addressable memory (CAM) integrated with non-volatile racetrack memory (RM) can perform the lookup function with a very fast speed. However, the bidirectional motion of domain walls (DWs) in the stripe-shaped RM based CAM will cause data overflow issue, resulting in larger physical size and lower performance. In this paper, a ring-shaped CAM based on spin orbit torque (SOT) driven chiral DW motions has been designed and simulated. Thanks to the circuit simplification and high efficiency of chiral DW motions, its area, energy consumption and operational speed can be greatly improved.
| Original language | English |
|---|---|
| Title of host publication | NANOARCH 2019 - 15th IEEE/ACM International Symposium on Nanoscale Architectures, Proceedings |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781728155203 |
| DOIs | |
| State | Published - Jul 2019 |
| Event | 15th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019 - Qingdao, China Duration: 17 Jul 2019 → 19 Jul 2019 |
Publication series
| Name | NANOARCH 2019 - 15th IEEE/ACM International Symposium on Nanoscale Architectures, Proceedings |
|---|
Conference
| Conference | 15th IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2019 |
|---|---|
| Country/Territory | China |
| City | Qingdao |
| Period | 17/07/19 → 19/07/19 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- content addressable memory
- racetrack memory
- ring shaped
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