TY - GEN
T1 - Research on Transient Conduction Sensitivity of the Chips Using TLP Method
AU - Fu, Lu
AU - Yan, Zhaowen
AU - Liu, Yuzhu
AU - Su, Donglin
N1 - Publisher Copyright:
© 2022 IEEE.
PY - 2022
Y1 - 2022
N2 - The response characteristics of six integrated circuits subjected to pulse conducted interference are investigated by TLP test method. The three loops from chips under test are selected to suffer pulse conducted interference, including VCC to ground, input to ground and output to ground. Results are summarized and compared by type of chips. Some interesting phenomena are discovered and analyzed in this paper.
AB - The response characteristics of six integrated circuits subjected to pulse conducted interference are investigated by TLP test method. The three loops from chips under test are selected to suffer pulse conducted interference, including VCC to ground, input to ground and output to ground. Results are summarized and compared by type of chips. Some interesting phenomena are discovered and analyzed in this paper.
KW - electrostatic distrarge(ESD)
KW - integrated circuits (ICs)
KW - transient conduction sensitivity
KW - transmission line pulse(TLP)
UR - https://www.scopus.com/pages/publications/85139528926
U2 - 10.1109/APEMC53576.2022.9888305
DO - 10.1109/APEMC53576.2022.9888305
M3 - 会议稿件
AN - SCOPUS:85139528926
T3 - 2022 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2022
SP - 503
EP - 505
BT - 2022 Asia-Pacific International Symposium on Electromagnetic Compatibility, APEMC 2022
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th Asia-Pacific International Symposium on Electromagnetic Compatibility and Technical Exhibition, APEMC 2022
Y2 - 1 September 2022 through 4 September 2022
ER -