Abstract
FPGAs are widely adopted in many application domains and the higher accuracy requirement of FPGA makes the diagnostics and prognostics techniques of FPGA-based system is becoming increasingly important. This paper takes the stuck-at fault of look-up table in programmable logic blocks as a research object and presents the diagnostic method based on the Built-in Self Test. Example is provided for the approach and some basic physics of failure models are given to estimate the damage to the FPGA.
| Original language | English |
|---|---|
| DOIs | |
| State | Published - 2012 |
| Event | 2012 3rd Annual IEEE Prognostics and System Health Management Conference, PHM-2012 - Beijing, China Duration: 23 May 2012 → 25 May 2012 |
Conference
| Conference | 2012 3rd Annual IEEE Prognostics and System Health Management Conference, PHM-2012 |
|---|---|
| Country/Territory | China |
| City | Beijing |
| Period | 23/05/12 → 25/05/12 |
Keywords
- BIST
- FPGA
- fault models
- physics of failure
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