Research and implementation of telemetry data synchronization technology based on PCI bus and FPGA

Code synchronization and frame synchronization of the telemetry data play an important role in the telemetry data processing system. The function of data processing is realized by field programmable gate array (FPGA). Code synchronization is realized through digital phase locked loop (DPLL). The error-tolerant technology is combined with non-error-tolerant technology to carry out the frame synchronization. The method enhances the detection speed and the anti-jamming ability of the system. Finally, the received information data through peripheral component interconnect (PCI) bus are proceeded by the computer.