Skip to main navigation Skip to search Skip to main content

Remapping NUCA: Improving NUCA cache's power efficiency

  • Beihang University
  • Intel

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Power efficiency has been recognized as an important factor of the computing technology. On-chip caches represent a sizable faction of the total power consumption of microprocessors. Non-uniform cache access (NUCA) cache split the cache into several tiles, which enables the ability to power down some tiles at run time. We observed that some workloads have related small working set, thus we can dynamic power down some tiles at runtime to save leakage power with little performance degradation. In this paper, we propose Remapping NUCA, a mechanism to power down some tiles to improve the NUCA cache's power efficiency. Experimental results show that our mechanism can save 39.58% power on average with less than 5% performance degradation. Finally we point out some directions to further improve the NUCA cache's performance and power efficiency.

Original languageEnglish
Title of host publicationProceedings - 16th IEEE International Conference on High Performance Computing and Communications, HPCC 2014, 11th IEEE International Conference on Embedded Software and Systems, ICESS 2014 and 6th International Symposium on Cyberspace Safety and Security, CSS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages38-41
Number of pages4
ISBN (Electronic)9781479961238
DOIs
StatePublished - 9 Mar 2014
Event16th IEEE International Conference on High Performance Computing and Communications, HPCC 2014, 11th IEEE International Conference on Embedded Software and Systems, ICESS 2014 and 6th International Symposium on Cyberspace Safety and Security, CSS 2014 - Paris, France
Duration: 20 Aug 201422 Aug 2014

Publication series

NameProceedings - 16th IEEE International Conference on High Performance Computing and Communications, HPCC 2014, 11th IEEE International Conference on Embedded Software and Systems, ICESS 2014 and 6th International Symposium on Cyberspace Safety and Security, CSS 2014

Conference

Conference16th IEEE International Conference on High Performance Computing and Communications, HPCC 2014, 11th IEEE International Conference on Embedded Software and Systems, ICESS 2014 and 6th International Symposium on Cyberspace Safety and Security, CSS 2014
Country/TerritoryFrance
CityParis
Period20/08/1422/08/14

Keywords

  • cache memory
  • non-uniform cache access architecture
  • power efficiency

Fingerprint

Dive into the research topics of 'Remapping NUCA: Improving NUCA cache's power efficiency'. Together they form a unique fingerprint.

Cite this