TY - GEN
T1 - Reliability-enhanced hybrid CMOS/MTJ logic circuits
AU - Zhang, D.
AU - Zeng, L.
AU - Zhang, Y.
AU - Klein, J.
AU - Zhao, W.
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/8/10
Y1 - 2017/8/10
N2 - Benefitting from its non-volatility, low power, high speed, nearly infinite endurance, good scalability and great CMOS compatibility, magnetic tunnel junction (MTJ) embedded in conventional CMOS logic circuits has been proposed as one potentially powerful solution to introduce non-volatility in today's programmable logic circuits, which is envisioned to extend the Moore's law [1].
AB - Benefitting from its non-volatility, low power, high speed, nearly infinite endurance, good scalability and great CMOS compatibility, magnetic tunnel junction (MTJ) embedded in conventional CMOS logic circuits has been proposed as one potentially powerful solution to introduce non-volatility in today's programmable logic circuits, which is envisioned to extend the Moore's law [1].
UR - https://www.scopus.com/pages/publications/85034661713
U2 - 10.1109/INTMAG.2017.8008049
DO - 10.1109/INTMAG.2017.8008049
M3 - 会议稿件
AN - SCOPUS:85034661713
T3 - 2017 IEEE International Magnetics Conference, INTERMAG 2017
BT - 2017 IEEE International Magnetics Conference, INTERMAG 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 IEEE International Magnetics Conference, INTERMAG 2017
Y2 - 24 April 2017 through 28 April 2017
ER -